Quick Answer: Dry etching and wet etching are the two primary material removal processes in semiconductor and precision microfabrication. Dry etching uses plasma or reactive gases (RIE, DRIE, plasma etching) to remove material through directional ion bombardment and reactive chemistry, producing anisotropic (vertical) sidewalls and feature control of ±1–2 µm at sub-20 µm feature sizes. Wet etching uses liquid chemical etchants (HF for silicon dioxide, KOH for silicon, FeCl₃ for copper) that react isotropically — removing material in all directions simultaneously — producing sloped or undercut sidewall profiles. The selection is driven by three factors: feature size (below approximately 10–20 µm, wet etching’s lateral etch dimension undermines dimensional control), aspect ratio (above approximately 3:1 depth-to-width, wet etching collapses narrow structures through undercutting), and sidewall requirement (vertical walls required for MEMS beam structures, FinFET fins, and microfluidic channels with controlled flow geometry). When these constraints are absent — PCB copper patterning, bulk silicon removal, metal sheet etching with features above 100 µm — wet etching is the correct choice, providing 30–70% lower cost per part and substantially higher throughput.
The Fundamental Physical Difference
The critical distinction between dry and wet etching is directionality, and directionality determines whether a process can maintain the designed feature geometry.
Wet etching is isotropic: A liquid etchant reaches the substrate by diffusion and attacks the exposed material in all directions at roughly equal rates. The lateral etch rate approximately equals the vertical etch rate. For a feature etched to a depth d through a mask opening of width w, the undercutting on each side is approximately equal to d (for fully isotropic etching). A 10 µm deep etch therefore produces approximately 10 µm of lateral undercut on each side, reducing the feature width by approximately 20 µm from the mask-defined dimension. For a 5 µm wide mask opening etched to 10 µm depth, this means the feature is completely undercut and the structural integrity is lost. The undercut also produces a rounded sidewall profile rather than a vertical wall.
Dry etching is anisotropic: Plasma-based dry etching delivers high-energy ions normal to the substrate surface. These ions remove material primarily in the vertical direction; the ion-bombardment-enhanced reaction rate in the vertical direction is typically 5–50× greater than the lateral chemical reaction rate, depending on process parameters. Reactive Ion Etching (RIE) and Deep Reactive Ion Etching (DRIE, also known as the Bosch process) use the Passivation-Etch cycle to achieve nearly vertical sidewalls: a polymer passivation layer is deposited on all surfaces, then ion bombardment removes it from horizontal surfaces only, allowing etching to proceed vertically while the polymer protects lateral walls. DRIE routinely achieves aspect ratios of 20:1 to 50:1 with sidewall angles within 2–3° of vertical.
The practical geometry consequence: For a MEMS accelerometer with 5 µm wide beams and 50 µm etch depth (10:1 aspect ratio), wet etching would completely undercut and destroy the beam structure. DRIE maintains the beam geometry within the required dimensional tolerance, enabling the device to function as designed.
Process Comparison
| Factor | Dry Etching (RIE/DRIE) | Wet Etching |
|---|---|---|
| Directionality | Anisotropic (vertical etch dominates) | Isotropic (equal in all directions) |
| Sidewall profile | Near-vertical (88–90° typical for DRIE) | Sloped or undercut (typically 45–75°) |
| Feature size capability | Sub-micron to ~100 µm; standard for <20 µm | Practical lower limit ~20–50 µm (depending on etch depth) |
| Aspect ratio capability | 10:1 to 50:1 for DRIE | Typically limited to <3:1 before severe undercut |
| Dimensional control | ±1–2 µm typical; ±0.5 µm with advanced processes | ±5–20 µm typical, etch-time dependent |
| Equipment cost | High ($200,000–$2,000,000+ for RIE/DRIE systems) | Low ($5,000–$50,000 for chemical tanks and control systems) |
| Process complexity | High (plasma parameters, chamber conditioning, gas control) | Low (temperature and concentration control) |
| Throughput | Lower (typically 1–6 wafers/hour for DRIE) | High (batch processing, many wafers/hour) |
| Cost per wafer/part | High | Low (30–70% lower for appropriate applications) |
| Material selectivity | High (tunable by gas chemistry) | Moderate to high (material-specific etchants) |
| Safety and waste | Reactive gases; controlled waste handling | Hazardous liquid chemicals; neutralization required |
| Primary applications | MEMS, semiconductor devices, microfluidics | PCB, bulk silicon removal, metal sheet etching, cleaning |
When Dry Etching Is Required
Dry etching becomes the necessary process — not a preference — when the geometry of the feature cannot survive the isotropic undercutting of wet etching.
Advanced semiconductor devices (CMOS, FinFET, power devices): FinFET transistor gates have fin widths of 5–10 nm in current production processes. The etch depth of the fin recess is comparable to the fin width, producing aspect ratios well above 1:1. Wet etching at this scale would completely undercut the fin geometry in nanometer-scale time — the process is physically incompatible with the geometry. All feature definition in modern CMOS fabrication below approximately 100 nm uses plasma-based processes exclusively.
For power semiconductor devices (IGBTs, MOSFETs with trench gate structures), the trench gates are 0.5–2 µm wide and 3–8 µm deep — aspect ratios of 4:1 to 10:1. The electrical performance of the device (blocking voltage, on-resistance) depends on the precise trench geometry. Undercutting of the trench corners by even 0.5–1 µm changes the electric field distribution at the gate and degrades device characteristics.
MEMS structures: MEMS devices (inertial sensors, pressure sensors, microphones, RF resonators) use suspended or freestanding mechanical structures — beams, membranes, cantilevers — with typical dimensions of 2–50 µm wide and 20–200 µm deep. DRIE is the enabling process for most of these structures. The Bosch process (alternating SF₆ etch and C₄F₈ passivation cycles) achieves etch rates of 5–30 µm/min with sidewall angles of 88–90° and can produce structures at 50:1 aspect ratio that are physically impossible by wet etching.
Microfluidics: In microfluidic devices for biomedical and chemical analysis, the channel cross-section directly determines the flow behavior (laminar flow regime, mixing characteristics, pressure drop). A channel designed as 20 µm wide by 50 µm deep cannot tolerate 10+ µm of undercut in each wall without completely changing the intended flow characteristics. Dry etching maintains the channel cross-section within the design tolerance.
Precision pattern transfer: Any application requiring transfer of a mask-defined pattern to the substrate with minimal dimensional deviation — photonic waveguides, diffraction gratings, micro-optical elements — requires dry etching. The mask feature dimension is reproduced in the substrate with the lateral bias limited by plasma process parameters rather than isotropic chemical diffusion.
When Wet Etching Is the Correct Choice
Wet etching is not the inferior option — it is the most efficient and economical process for a large class of applications where the isotropic etch profile is either acceptable or irrelevant.
PCB copper patterning: The copper traces on a printed circuit board have minimum feature sizes typically above 75–100 µm for standard PCBs (25–50 µm for HDI boards). At 75 µm trace width etched through 35 µm copper, the lateral undercut is approximately 35 µm — reducing the trace width from the mask dimension by approximately 35 µm on each side. This is accounted for in the artwork sizing (the artwork is drawn wider than the target trace width to compensate for undercut), and the result is acceptable for standard PCB electrical performance. FeCl₃ or CuCl₂ wet etching of copper is the universal PCB production process because it is fast (etch rates of 25–75 µm/min), scalable to panel sizes of 600 mm × 600 mm and larger, and costs a fraction of any plasma-based alternative.
Bulk silicon removal and wafer thinning: Removing 100–300 µm of silicon from the back of a wafer for thinning, creating deep cavities for packaging, or batch-etching silicon substrates for MEMS device release — all of these are material removal operations where the etch rate and cost matter far more than sidewall precision. KOH (potassium hydroxide) etches silicon at approximately 1–3 µm/min and is selective against silicon nitride and silicon dioxide masking layers. For a 300 µm deep etch, completing the etch in 100–300 minutes is economically viable; the same removal by DRIE at 5–10 µm/min would require significantly more machine time at much higher machine cost per hour.
Surface cleaning and preparation: Dilute HF for native oxide removal, SC-1 and SC-2 cleans (standard cleaning solutions), and piranha clean for organic contamination removal are all wet chemical processes used universally in semiconductor manufacturing. These cleaning steps are not designed to pattern structures — they are designed to prepare surfaces for subsequent processing. The isotropic nature of the chemistry is not a constraint; uniform surface treatment is the goal.
Metal sheet etching for mechanical components: Chemical etching of stainless steel, copper, brass, and aluminum for industrial parts — spring contacts, shims, shields, decorative panels, encoder wheels — uses wet etching with feature sizes typically above 100–200 µm. At these dimensions, the undercut is proportionally small relative to the feature size (undercut / feature width ratio is approximately 1/2 to 1/5), and it is accounted for in the artwork compensation. The result is a formed metal part produced without stamping tooling investment, at 30–70% lower cost than plasma-based alternatives.
Cost Analysis: Total Manufacturing Cost, Not Process Cost
Evaluating wet etching vs dry etching on equipment or process cost alone is a systematic error. The correct comparison is cost per qualified part, which includes: process cost, yield, scrap, and rework.
The yield-adjusted cost comparison:
For a micro-patterned component requiring ±5 µm dimensional accuracy:
- Wet etching: Lower process cost (e.g., $0.50/wafer) but 25–30% out-of-tolerance rate due to undercutting variability → effective cost per qualified part = $0.50 / 0.72 yield = $0.69
- Dry etching: Higher process cost (e.g., $3.00/wafer) but 97–98% yield → effective cost per qualified part = $3.00 / 0.975 yield = $3.08
In this case, dry etching costs approximately 4.5× more per qualified part, which is justified only if the part function requires the dimensional accuracy that dry etching provides. For a part where ±50 µm accuracy is acceptable and wet etching achieves 97%+ yield, the yield-adjusted comparison reverses — wet etching is unambiguously more economical.
The hidden cost factors: Scrap parts that pass initial inspection but fail at device test (for semiconductor or MEMS applications), rework costs from out-of-tolerance features that require secondary processing, and qualification re-testing after process changes all add to the total cost that is not visible in simple process-rate comparisons.
The practical rule: When the application requires dry etching (feature size <20 µm, aspect ratio >3:1, vertical sidewalls required), the cost comparison with wet etching is irrelevant — wet etching cannot produce the functional part. When both processes can meet the tolerance, wet etching is almost always lower cost per qualified part.
Common Mistakes in Etching Process Selection
| Mistake | Consequence | Correct Approach |
|---|---|---|
| Using wet etching for high aspect ratio structures (>3:1) | Severe undercut collapses narrow features; parts non-functional | Switch to dry etching (RIE or DRIE); verify aspect ratio against process capability before committing |
| Using dry etching for all precision applications regardless of feature size | 2–5× cost increase with no functional benefit for features >100 µm | Use wet etching for features >50–100 µm where undercut compensation is acceptable; reserve dry etching for features requiring it |
| Evaluating cost on process rate only, ignoring yield | Lower apparent cost per run conceals higher cost per qualified part from scrap | Compare cost per qualified part: process cost ÷ yield |
| Ignoring mask selectivity in etch chemistry selection | Mask erodes before substrate reaches required depth; pattern distorted | Verify etch selectivity (substrate etch rate / mask etch rate) is sufficient for required etch depth; use hard mask (SiO₂, Si₃N₄, metal) for deep etches |
| Assuming wet etching tolerances are sufficient without calculating undercut | Undercut exceeds specification; rework or redesign required after production start | Calculate lateral etch at full etch depth; compare to dimensional tolerance; add artwork compensation or switch to dry etching if compensation exceeds half the feature width |
Key Takeaways
- The fundamental difference is directionality: wet etching is isotropic (equal etch rate in all directions, producing undercut and sloped sidewalls); dry etching is anisotropic (vertical ion bombardment dominates, producing near-vertical sidewalls). This difference is not a quality difference — it is a geometry capability difference.
- Feature size below approximately 10–20 µm and aspect ratio above 3:1 typically require dry etching: at these dimensions, the lateral undercut from wet etching is comparable to or exceeds the feature width, making the process geometrically incompatible regardless of chemistry optimization.
- DRIE (Bosch process) achieves aspect ratios of 20:1 to 50:1 with sidewall angles within 2–3° of vertical: this capability is fundamental to MEMS manufacturing and is not achievable by any wet chemistry process.
- PCB copper etching, bulk silicon removal, and metal sheet chemical etching are correctly done by wet processes: at the feature sizes and tolerances involved in these applications, wet etching is not a compromise — it is the most economical and technically appropriate process.
- Cost comparison must be yield-adjusted: wet etching at lower process cost but 25% scrap for a tight-tolerance part is not cheaper than dry etching at higher process cost and 97% yield. The correct comparison is process cost ÷ yield, not process cost alone.
- Mask selectivity must be verified for any deep etch: the etch selectivity (substrate etch rate / mask etch rate) must be sufficient to protect the mask for the full required etch depth. For deep etches in dry etching, hard masks (thermally grown SiO₂, LPCVD Si₃N₄, sputtered metal) provide higher selectivity than photoresist alone.
- For OEM procurement and engineering teams specifying etched components: drawings should specify the feature size, minimum aspect ratio, sidewall angle requirement (vertical vs sloped acceptable), and dimensional tolerance, not the etching process itself. This allows the supplier to select the appropriate process for the specification, and it also allows identification of cases where the specified tolerance requires dry etching (and the corresponding cost should be anticipated) vs cases where wet etching can meet the tolerance at lower cost.
Frequently Asked Questions
What is the main difference between dry etching and wet etching?
The fundamental difference is directionality. Wet etching uses liquid chemical etchants that dissolve exposed material isotropically — at approximately equal rates in all directions — producing sidewall profiles that are sloped or undercut beneath the mask. Dry etching uses plasma or reactive gases that deliver material removal preferentially in the vertical direction through ion bombardment, producing anisotropic (near-vertical) sidewalls. The practical consequence is that wet etching produces lateral undercut approximately equal to the etch depth, while dry etching (particularly DRIE) maintains lateral dimensions within 1–2 µm across etch depths of 100+ µm. For features wider than approximately 50–100 µm where undercut compensation is acceptable, wet etching is lower cost and higher throughput. For sub-20 µm features, high aspect ratio structures, or vertical sidewall requirements, dry etching is the appropriate process.
When is dry etching required versus optional?
Dry etching is required (not optional) when the lateral undercut from wet etching would exceed the dimensional tolerance of the feature. This occurs for: features below approximately 10–20 µm width; high aspect ratio structures with depth-to-width ratios above approximately 3:1; vertical sidewall requirements (MEMS beam structures, FinFET fins, microfluidic channels with controlled cross-section); and sub-100 nm features in advanced semiconductor manufacturing where wet etching is physically incompatible with the geometry. Dry etching is optional — and often incorrect — for features above 50–100 µm with tolerances above ±10–20 µm, high-volume applications, and applications where undercut can be compensated in the mask artwork. Using dry etching where wet etching would suffice adds cost without functional benefit.
Why does MEMS fabrication use dry etching?
MEMS devices (accelerometers, gyroscopes, pressure sensors, microphones) use suspended mechanical structures — beams, membranes, cantilevers — with feature widths of 2–20 µm and etch depths of 20–200 µm. These structures exist at aspect ratios of 5:1 to 50:1. Wet etching at these aspect ratios produces lateral undercut comparable to or exceeding the beam width, collapsing the structure before the intended depth is reached. DRIE (Deep Reactive Ion Etching, Bosch process) achieves 20:1 to 50:1 aspect ratios with sidewall angles within 2–3° of vertical at etch rates of 5–30 µm/min, enabling the precise mechanical structures that MEMS devices require. No wet chemistry process achieves these aspect ratios in silicon.
Can wet etching create vertical sidewalls?
Standard isotropic wet etching cannot create vertical sidewalls. Some crystallographic wet etching in oriented silicon substrates (e.g., KOH etching of (100) silicon) produces defined crystallographic planes at characteristic angles (54.7° from the surface for (111) planes in (100) silicon), which are geometrically predictable but not vertical. These angled planes are useful for certain MEMS applications (V-groove alignment features, anisotropically released membranes) but are not vertical and are only achievable in specific crystal orientations. For vertical or near-vertical sidewalls in general, dry etching is required.
How does etching process selection affect production yield?
Etching process selection affects yield through dimensional accuracy and process consistency. In tight-tolerance applications (feature dimensions controlled to ±5 µm or tighter), wet etching’s variability — from etchant concentration depletion, temperature variation, mask alignment, and time control — produces a wider distribution of feature dimensions than dry etching’s plasma-controlled process. If the specification tolerance is narrower than the wet etching dimensional variation, out-of-tolerance scrap rate is high, and the effective cost per qualified part increases proportionally. Dry etching, with tighter parameter control, produces narrower dimensional distributions and higher yield for tight-tolerance applications — offsetting the higher process cost per unit when yield-adjusted cost is calculated.
Technical references: Madou M.J. — Fundamentals of Microfabrication (Etching Processes chapters), Laermer F. and Schilp A. — Method of anisotropically etching silicon (original Bosch DRIE patent, EP 0625285), Franssila S. — Introduction to Microfabrication (Dry and Wet Etching chapters), SEMI Standards for Semiconductor Etching Processes, Wolf S. and Tauber R.N. — Silicon Processing for the VLSI Era Vol. 1 (Wet and Dry Etching chapters).
